rtl description造句
例句與造句
- Proper synthesis techniques ensure mathematical equivalency between the synthesized netlist and original RTL description.
- The Verilog RTL description is released under the GNU Lesser General Public License ( LGPL ).
- After simulation the RTL description must be synthesized to fit in the final hardware ( e . g.
- While logic synthesis uses an RTL description of the design, high-level synthesis works at a higher level of abstraction, starting with an algorithmic description in a high-level language such as SystemC and Ansi C / C + +.
- As logic synthesis matures, most functional verification is done at the higher abstraction, i . e . at RTL level, the correctness of logic synthesis tool in the translating process from RTL description to gate netlist is a less concern today.
- It's difficult to find rtl description in a sentence. 用rtl description造句挺難的
- Designers use XPS ( Xilinx Platform Studio ) to configure and build the hardware specification of their embedded system ( processor core, memory-controller, I / O peripherals, etc . ) The XPS converts the designer's platform specification into a synthesizeable RTL description ( Verilog or VHDL ), and writes a set of scripts to automate the implementation of the embedded system ( from RTL to the bitstream-file . ) For the MicroBlaze core, the EDK normally generates an encrypted ( non human-readable ) netlist, but the processor description ( written in VHDL ) can be purchased from Xilinx.